Integrated circuit package and packaging methods

US9236362B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Georg Meyer-Berg · Birkenfeld, DE
• Frank Daeche · Unterhaching, DE

Key dates

• Filing date: May 9, 2011
• Grant date: Jan 12, 2016
• Expiry date: Sep 23, 2031

Classification

• Technology area (CPC —): General

Abstract

An integrated circuit package includes a package module formed from successive build-up layers which define circuit interconnections, a cavity formed on a top-side of the package module, a chip having a front side with forward contacts and having a back-side, the chip disposed such that in the cavity such that at least one forward contact is electrically connected to at least one of the circuit interconnections of the package module, and a top layer coupled to the back-side of the chip covering at least a part of the chip and the top-side of the package module.