Pseudo block operation mode in 3D NAND
US9240241B2 · kind B2 · utility
8Cited by
4References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 8, 2014 |
| Grant date | Jan 19, 2016 |
| Priority date | — |
| Expiry date | Dec 8, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A 3D NAND stacked non-volatile memory device, comprising: a string comprising a plurality of non-volatile storage elements, the string comprises a channel and extends vertically through layers of the 3D stacked non-volatile memory device, and the plurality of storage elements are subdivided into different groups based on group assignments, each group of the different groups comprises multiple adjacent storage elements of the plurality of storage elements; and a control circuit in communication with the string, the control circuit, to perform a Pseudo Block Operation Mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.