Automatic construction of deadlock free interconnects
US9244880B2 · kind B2 · utility
26Cited by
40References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2012 |
| Grant date | Jan 26, 2016 |
| Priority date | — |
| Expiry date | Jun 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for automatically building a deadlock free inter-communication network in a multi-core system are described. The example embodiments described herein involve deadlock detection during the mapping of user specified communication pattern amongst blocks of the system. Detected deadlocks are then avoided by re-allocation of channel resources. An example embodiment of the deadlock avoidance scheme is presented on Network-on-chip interconnects for large scale multi-core system-on-chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.