Seed layer for a p+ silicon germanium material for a non-volatile memory device and method
US9252191B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2011 |
| Grant date | Feb 2, 2016 |
| Priority date | — |
| Expiry date | May 31, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0262
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a non-volatile memory device includes providing a substrate having a surface, depositing a dielectric overlying the surface, forming a first wiring structure overlying the dielectric, depositing silicon material overlying the first wiring structure, the silicon layer having a thickness of less than about 100 Angstroms, depositing silicon germanium material at a temperature raging from about 400 to about 490 Degrees Celsius overlying the first wiring structure using the silicon layer as a seed layer, wherein the silicon germanium material is substantially free of voids and has polycrystalline characteristics, depositing resistive switching material (e.g. amorphous silicon material) overlying the silicon germanium material, depositing a conductive material overlying the resistive material, and forming a second wiring structure overlying the conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.