Methods for fabricating integrated circuits including densifying interlevel dielectric layers

US9257329B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Oliver Mieth · Dresden, DE
• Carsten Peters · Dresden, DE
• Torsten Huisinga · Dresden, DE

Key dates

• Filing date: Feb 20, 2014
• Grant date: Feb 9, 2016
• Expiry date: Mar 13, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76804
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes densifying an upper-surface portion of an ILD layer of dielectric material that overlies a metallization layer above a semiconductor substrate to form a densified surface layer of dielectric material. The densified surface layer and the ILD layer are etched through to expose a metal line of the metallization layer.