Facilitating fabricating gate-all-around nanowire field-effect transistors
US9263520B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2013 |
| Grant date | Feb 16, 2016 |
| Priority date | — |
| Expiry date | Dec 7, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods are presented for facilitating fabrication of a semiconductor device, such as a gate-all-around nanowire field-effect transistor. The methods include, for instance: providing at least one stack structure including at least one layer or bump extending above the substrate structure; selectively oxidizing at least a portion of the at least one stack structure to form at least one nanowire extending within the stack structure(s) surrounded by oxidized material of the stack structure(s); and removing the oxidized material from the stack structure(s), exposing the nanowire(s). This selectively oxidizing may include oxidizing an upper portion of the substrate structure, such as an upper portion of one or more fins supporting the stack structure(s) to facilitate full 360° exposure of the nanowire(s). In one embodiment, the stack structure includes one or more diamond-shaped bumps or ridges.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.