Method for increasing the robustness of a double patterning router used to manufacture integrated circuit devices
US9268897B2 · kind B2 · utility
2Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 7, 2012 |
| Grant date | Feb 23, 2016 |
| Priority date | — |
| Expiry date | Oct 2, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A process for manufacturing integrated circuit devices includes providing a set of original color rules defining an original color rule space and defining a design space. The improvement involves applying a perturbed color rule space to the router processing engine to expose double pattern routing odd cycle decomposition errors, and reconfiguring the router processing engine in accordance with the exposed decomposition errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.