Integrated circuits having finFETs with improved doped channel regions and methods for fabricating same

US9287180B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Jinping Liu · Ballston Lake, US
• Bharat Krishnan · Mechanicville, US
• Bongki Lee · Malta, US
• Vidmantas Sargunas · Clifton Park, US
• Weihua Tong · Mechanicville, US
• Seung Kim · Bodden Town, KY

Key dates

• Filing date: Jun 24, 2015
• Grant date: Mar 15, 2016
• Expiry date: Jun 24, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0193

Abstract

Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes forming a first fin structure overlying a first type region in a semiconductor substrate and forming a second fin structure overlying a second type region in the semiconductor substrate. A gate is formed overlying each fin structure and defines a channel region in each fin structure. The method includes masking the second type region and etching the first fin structure around the gate in the first fin structure to expose the channel region in the first fin structure. Further, the method includes doping the channel region in the first fin structure, and forming source/drain regions of the first fin structure around the channel region in the first fin structure.