Semiconductor devices and methods for backside photo alignment

US9299663B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Brandon P. Wirz · Boise, US
• Keith E. Ypma · Boise, US
• Christopher J. Gambee · Caldwell, US
• Jaspreet S. Gandhi · Milpitas, US
• Kevin M. Dowdle · Pocatello, US
• Irina Vasilyeva · Boise, US
• Yang Chao · Boise, US
• Jon Hacker · Meridian, US

Key dates

• Filing date: May 19, 2014
• Grant date: Mar 29, 2016
• Expiry date: May 19, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Various embodiments of microelectronic devices and methods of manufacturing are described herein. In one embodiment, a method for aligning an electronic feature to a through-substrate via includes forming a self-aligned alignment feature having a wall around at least a portion of the TSV and aligning a photolithography tool to the self-aligned alignment feature. In some embodiments, the self-aligned alignment feature is defined by the topography of a seed material at a backside of the device.