Package with multiple plane I/O structure
US9299677B2 · kind B2 · utility
1Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2013 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | May 18, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A embodiment package includes a three dimensional integrated circuit (3D IC) with first input/output pads on a first side and second input/output pads on a second side, a first fan out structure electrically coupled to the first input/output pads on the first side of the three dimensional integrated circuit, and a second fan out structure electrically coupled to the second input/output pads on the second side of the three dimensional integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.