Device and method for stopping etching process
US9305798B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2013 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | May 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for etching a layer assembly, the layer assembly including an intermediate layer sandwiched between an etch layer and a stop layer, the method including a step of etching the etch layer using a first etchant and a step of etching the intermediate layer using a second etchant. The first etchant includes a first etch selectivity of at least 5:1 with respect to the etch layer and the intermediate layer. The second etchant includes a second etch selectivity of at least 5:1 with respect to the intermediate layer and the stop layer. The first etchant being is different from the second etchant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.