Non-volatile memory and method with adjusted timing for individual programming pulses
US9318204B1 · kind B1 · utility
5Cited by
14References
20Claims
0Family size
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Key dates
| Filing date | Oct 7, 2014 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Oct 7, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory and method have programming circuitry that outputs a series of programming pulses of increasing voltage level to program in parallel a group of memory cells associated with a selected word line. Individual timing of the programming pulses such as rise and fall times of the pulse is optimally and dynamically adjusted according to the relative numbers of program-enabled and program-inhibited memory cells in the group associated with that pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.