Methods of forming contacts on semiconductor devices and the resulting devices
US9324656B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2015 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Mar 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One method of forming a transistor device comprised of a source/drain region and a gate structure includes forming a dielectric layer above the gate structure and the source/drain region. A first opening is formed in at least the dielectric layer to expose the gate structure. A first spacer is formed on sidewalls of the first opening. After forming the first spacer, a second opening is formed in at least the dielectric layer to expose a portion of the source/drain region. The first spacer at least partially defines a spacing between the first opening and the second opening. A conductive gate contact is formed in the first opening and a conductive source/drain contact is formed in the second opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.