Multi-phase source/drain/gate spacer-epi formation
US9337306B2 · kind B2 · utility
26Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2014 |
| Grant date | May 10, 2016 |
| Priority date | — |
| Expiry date | Dec 10, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
Approaches for forming an epitaxial (epi) source/drain (S/D) and/or a semiconductor device having an epi S/D are provided. In embodiments of the invention, a first portion of the epi S/D is formed in the S/D region on a fin in a finned substrate. After the first portion is formed, but before completion of the formation of the S/D, a secondary spacer is formed in the S/D region. Then, the remainder portion of the S/D is formed in the S/D region. As a result, the S/D is separated from the gate stack by the secondary spacer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.