Protection against side-channel attacks on non-volatile memory
US9343162B2 · kind B2 · utility
7Cited by
27References
24Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 25, 2014 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Aug 25, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1433
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory (NVM) device includes an NVM array, which is configured to store data, and control logic. The control logic is configured to receive data values for storage in the NVM array, and to write at least some of the received data values to the NVM array and simultaneously to write complements of the at least some of the received data values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.