Universal solder joints for 3D packaging
US9343420B2 · kind B2 · utility
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14References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2014 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Feb 14, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/12042
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Electronic devices including solder bumps embedded in a pre-applied coating of underfill material and/or solder resist are fabricated, thereby improving chip-package interaction reliability. Underfill can be directly applied to a wafer, enabling increased filler loadings. Passages formed in the underfill and/or solder resist coating expose electrically conductive pads or metal pillars. Such passages can be filled with molten solder to form the solder bumps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.