Implementing eDRAM stacked FET structure

US9343464B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Karl R. Erickson · Rochester, US
• David P. Paulsen · Dodge Center, US
• John E. Sheets, II · Zumbrota, US
• Kelly L. Williams · Rochester, US

Key dates

• Filing date: Jul 8, 2013
• Grant date: May 17, 2016
• Expiry date: Jun 17, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/68

Abstract

A method and circuit for implementing an embedded dynamic random access memory (eDRAM), and a design structure on which the subject circuit resides are provided. The embedded dynamic random access memory (eDRAM) circuit includes a stacked field effect transistor (FET) and capacitor. The capacitor is fabricated directly on top of the FET to build the eDRAM.