Integrated circuit having multiple threshold voltages
US9362180B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2014 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Mar 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one aspect there is set forth herein an integrated circuit having a first plurality of field effect transistors and a second plurality of field effect transistor, wherein field effect transistors of the first plurality of field effect transistors each have a first gate stack and wherein field effect transistors of the second plurality of field effect transistors each have a second gate stack, the second gate stack being different from the first gate stack by having a metal layer common to the first gate stack and the second gate stack that includes a first thickness at the first gate stack and a second thickness at the second gate stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.