Self-adjusting regulation current for memory array source line
US9368224B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2014 |
| Grant date | Jun 14, 2016 |
| Priority date | — |
| Expiry date | Feb 7, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
To maintain stability of memory array operations, a supplemental current can supply a common source line of a memory array so that the combined current from the memory array and supplemental current is at least a minimum regulation current level. When enabled for sensing operations, a driver circuit maintains the common source line's voltage level. A current subtractor circuit determines the difference between a reference current and a current proportional to the current flowing from the array, where the reference current is proportional to the minimum regulation current. The difference current is then mirrored by a self-adjusting current loop and supplied to the common source line to maintain its current level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.