Etching method for forming grooves in Si-substrate and fin field-effect transistor
US9373718B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2014 |
| Grant date | Jun 21, 2016 |
| Priority date | — |
| Expiry date | Nov 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An etching method adapted to forming grooves in Si-substrate and FinFET transistor manufactured thereof are provided. The etching method includes providing a silicon substrate, at least two gate structures formed on the silicon substrate and at least two gate spacer structures disposed on the silicon substrate; performing a first etching process on the silicon substrate to form a first groove, which has a base and two inclined sidewalls, ascending to respective bottoms of the gate structures, and are interconnected with the base, respectively; and performing a second etching process on the silicon substrate at the base of the first groove, so as to form a second groove in an inverted -symbol shape, wherein the two inclined sidewalls of the first groove are interconnected with the second groove respectively, and the first etching process is substantially different from the second etching process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.