Semiconductor die assemblies and semiconductor devices including same
US9379091B2 · kind B2 · utility
12Cited by
29References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2014 |
| Grant date | Jun 28, 2016 |
| Priority date | — |
| Expiry date | Aug 20, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of fabricating multi-die assemblies including a wafer segment having no integrated circuitry thereon and having a plurality of vertically stacked dice thereon electrically interconnected by conductive through vias, resulting multi-die assemblies, and semiconductor devices comprising such multi-die assemblies. The wafer segment may function as a heat sink to enhance heat transfer from the stacked dice in the resulting multi-die assembly. The die stacks are fabricated at the wafer level on a base wafer, from which the wafer segment and die stacks are singulated after at least peripheral encapsulation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.