Write sequence providing write abort protection
US9384839B2 · kind B2 · utility
11Cited by
23References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2013 |
| Grant date | Jul 5, 2016 |
| Priority date | — |
| Expiry date | Dec 19, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/71
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a multi-level cell (MLC) nonvolatile memory array, data is assigned sequentially to the lower and upper page of a word line, then both lower and upper pages are programmed together before programming a subsequent word line. Word lines of multiple planes are programmed together using latches to hold data until all data is transferred. Tail-ends of data of write commands are stored separately.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.