Patent · US Active

Multi-gate FETs having corrugated semiconductor stacks and method of forming the same

US9391176B2 · kind B2 · utility

7Cited by

6References

17Claims

0Family size

Assignee

GlobalFoundries Inc. · KY

Inventors

Stefan Flachowsky · Dresden, DE
Jan Hoentschel · Dresden, DE
Ralf Richter · Dresden, DE
Peter Javorka · Radebeul, DE

Key dates

Filing date	Oct 23, 2014
Grant date	Jul 12, 2016
Priority date	—
Expiry date	Oct 23, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH10D64/518
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

The present disclosure provides, in various aspects of the present disclosure, a semiconductor device which includes a semiconductor stack disposed over a surface of a substrate and a gate structure partially formed over an upper surface and two opposing sidewall surfaces of the semiconductor stack, wherein the semiconductor stack includes an alternating arrangement of at least two layers formed by a first semiconductor material and a second semiconductor material which is different from the first semiconductor material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.