High density interconnection of microelectronic devices

US9397071B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Omkar G. Karhade · Chandler, US
• John S. Guzek · Chandler, US
• Johanna M. Swan · Scottsdale, US
• Christopher J. Nelson · Hiram, US
• Nitin A. Deshpande · Chandler, US
• William J. Lambert · Chandler, US
• Charles A. Gealer · Phoenix, US
• Feras Eid · Chandler, US
• Islam A. Salama · Scottsdale, US
• Kemal Aygun · Tempe, US
• Sasha N. Oster · Chandler, US
• Tyler N. Osborn · Gilbert, US

Key dates

• Filing date: Dec 11, 2013
• Grant date: Jul 19, 2016
• Expiry date: Jun 12, 2034

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T29/49155
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A microelectronic package of the present description may comprises a first microelectronic device having at least one row of connection structures electrically connected thereto and a second microelectronic device having at least one row of connection structures electrically connected thereto, wherein the connection structures within the at least one first microelectronic device row are aligned with corresponding connection structures within the at least one second microelectronic device row in an x-direction. An interconnect comprising an interconnect substrate having a plurality of electrically isolated conductive traces extending in the x-direction on a first surface of the interconnect substrate may be attached to the at least one first microelectronic device connection structure row and the at least one second microelectronic device connection structure row, such that at least one interconnect conductive trace forms a connection between a first microelectronic device connection structure and its corresponding second microelectronic device connection structure.