Liner for phase change memory (PCM) array and associated techniques and configurations
US9397143B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2013 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Dec 20, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/882
Abstract
Embodiments of the present disclosure describe a liner for a phase change memory (PCM) array and associated techniques and configurations. In an embodiment, a substrate, an array of phase change memory (PCM) elements disposed on the substrate, wherein individual PCM elements of the array of PCM elements comprise a chalcogenide material and a liner disposed on sidewall surfaces of the individual PCM elements, wherein the liner comprises aluminum (Al), silicon (Si) and oxygen (O). Other embodiments may be described and/or claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.