Fault protection for high-fanout signal distribution circuitry
US9397663B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2015 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Jun 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0375
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An Integrated Circuit (IC) includes signal distribution circuitry and protection circuitry. The signal distribution circuitry is configured to distribute a high-fanout signal across the IC. The protection circuitry includes a plurality of logic stages and detection circuitry. The logic stages are configured to receive multiple instances of the signal that are sampled at multiple sampling points in the signal distribution circuitry. The logic stages are interconnected to drive one another in accordance with a given topology so as to propagate abnormalities indicative of faults occurring in the signal distribution circuitry. The detection circuitry is configured to detect a fault in the signal distribution circuitry in response to an abnormality propagating in the plurality of logic stages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.