Integration method for fabrication of metal gate based multiple threshold voltage devices and circuits

US9455201B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Manoj Joshi · Clifton Park, US
• Manfred Eller · Wappingers Falls, US
• Rohit Pal · Fishkill, US
• Richard J. Carter · Los Altos, US
• Srikanth B. Samavedam · Austin, US
• Bongki Lee · Malta, US
• Jin Ping Liu · Ballston Lake, US

Key dates

• Filing date: Feb 25, 2014
• Grant date: Sep 27, 2016
• Expiry date: Apr 7, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85

Abstract

In one aspect there is set forth herein a semiconductor device having a first field effect transistor formed in a substrate structure, and a second field effect transistor formed in the substrate structure. The first field effect transistor can include a first substrate structure doping, a first gate stack, and a first threshold voltage. The second field effect transistor can include the first substrate structure doping, a second gate stack different from the first gate stack, and a second threshold voltage different from the first threshold voltage.