Low temperature deposition of low loss dielectric layers in superconducting circuits

US9455393B1 · kind B1 · utility

Assignee

• INTERMOLECULAR, INC. · US

Inventors

• Ashish Bodke · San Jose, US
• Frank Greer · Pasadena, US
• Mark Clark · Santa Clara, US

Key dates

• Filing date: Dec 28, 2015
• Grant date: Sep 27, 2016
• Expiry date: Jan 3, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N69/00

Abstract

Provided are superconducting circuits and method of forming thereof. A superconducting circuit may include a low loss dielectric (LLD) layer formed from one or both of polycrystalline silicon or polycrystalline germanium. The LLD layer may be formed at a low temperature (e.g., less than about 525° C.) using chemical vapor deposition (CVD). Addition of germanium may help to lower the deposition temperature and improve crystallinity of the resulting layer. The LLD layer is formed without adding silicides at the interface of the LLD layer and metal electrode. In some embodiments, an initial layer (e.g., a seed layer or a protective layer) may be formed on a metal electrode prior to forming the LLD layer. For example, the initial layer may include one of zinc sulfide, polycrystalline germanium, or polycrystalline silicon. The initial layer may be deposited at a low pressure (e.g., less than 10 Torr) to ensure higher levels of crystallinity.