Programmable-resistance non-volatile memory
US9508434B2 · kind B2 · utility
4Cited by
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8Claims
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Key dates
| Filing date | Jul 23, 2015 |
| Grant date | Nov 29, 2016 |
| Priority date | — |
| Expiry date | Jul 23, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory including a plurality of elementary cells, each cell including: a first programmable-resistance storage element connected between first and second nodes of the cell; a first access transistor coupling the second node to a third node of the cell; and a second access transistor coupling the second node to a fourth node of the cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.