Bulk fin formation with vertical fin sidewall profile

US9515089B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Kangguo Cheng · Schenectady, US
• Hong He · Schenectady, US
• Sivananda K. Kanakasabapathy · Niskayuna, US
• Chiahsun Tseng · Wynantskill, US
• Yunpeng Yin · Guilderland, US

Key dates

• Filing date: May 14, 2015
• Grant date: Dec 6, 2016
• Expiry date: May 14, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02255
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Fabricating a semiconductor device includes providing a substrate, wherein the substrate is comprised of a base layer, a doped silicon layer on top of the base layer, and an undoped silicon layer on top of the doped silicon layer; forming a hard mask layer on top of the substrate; forming at least one mandrel on top of the hard mask layer; forming a spacer layer on top of exposed portions of the hard mask layer and the at least one mandrel; etching portions of the spacer layer; removing the at least one mandrel; etching regions of the hard mask layer and the undoped silicon layer not protected by remaining portions of the spacer layer to form at least one fin; and removing the remaining portions of the spacer layer.