Patent · US Active

E-fuse design for high-K metal-gate technology

US9515155B2 · kind B2 · utility

9Cited by

1References

23Claims

0Family size

Assignee

GlobalFoundries Inc. · KY

Inventors

Roman Boschke · Dresden, DE
Stefan Flachowsky · Dresden, DE
Maciej Wiatr · Dresden, DE
Christian Schippel · Dresden, DE

Key dates

Filing date	Dec 20, 2013
Grant date	Dec 6, 2016
Priority date	—
Expiry date	Dec 20, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

E-fuses are used in integrated circuits in order to permit real-time dynamic reprogramming of the circuit after manufacturing. An e-fuse is hereby proposed wherein the metal element adapted to be blown upon passage of a current is not comprised of a silicide layer but is rather a metal layer above which a semiconductor layer is formed. A dielectric layer is then formed on the semiconductor layer, in order to prevent metal silicide from forming over the metal layer. The process of manufacturing the e-fuse can be easily integrated in an HKMG manufacturing flow. In particular, fully silicided metal gates may be manufactured in conjunction with the e-fuse, without jeopardizing the correct functioning of the e-fuse.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.