Radiation tolerant device structure
US9515171B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2015 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | Oct 22, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3086
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Techniques for producing radiation tolerant device structures are provided. In one aspect, a method for forming a radiation-hardened device includes the steps of: forming fin masks on a SOI layer of an SOI wafer, wherein the SOI wafer includes the SOI layer separated from a substrate by a buried insulator; patterning fins in the SOI layer using the fin masks; and implanting at least one dopant into exposed portions of the buried insulator between the fins to increase a radiation hardness of the device structure by providing a path in the buried insulator for charge to dissipate, wherein the fin masks are left in place during the implanting step to prevent damage to the fins. Implementations with a bulk substrate, as well as the resulting devices, are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.