Patent · US Active

Semiconductor devices having metal gate and method for manufacturing semiconductor devices having metal gate

US9530778B1 · kind B1 · utility

24Cited by
7References
11Claims
0Family size

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Key dates

Filing dateAug 25, 2015
Grant dateDec 27, 2016
Priority date
Expiry dateAug 25, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/853
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Semiconductor devices having metal gate include a substrate, a first nFET device formed thereon, and a second nFET device formed thereon. The first nFET device includes a first n-metal gate, and the first n-metal gate includes a third bottom barrier metal layer and an n type work function metal layer. The n type work function metal layer directly contacts the third bottom barrier layer. The second nFET device includes a second n-metal gate and the second n-metal gate includes a second bottom barrier metal layer, the n type work function metal layer, and a third p type work function metal layer sandwiched between the second bottom barrier metal layer and the n type work function metal layer. The third p type work function metal layer of the second nFET device and the third bottom barrier metal layer of the first nFET device include a same material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.