Sidecar SRAM for high granularity in floor plan aspect ratio
US9575891B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2014 |
| Grant date | Feb 21, 2017 |
| Priority date | — |
| Expiry date | Dec 25, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/2532
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for floorplanning a memory. A computing system includes a processing unit which generates memory access requests and a memory. The size of each memory line in the memory includes M bits. The memory includes at least a primary bank and a sidecar bank. The primary bank includes a first portion with (M−A) bits of the M bits of a memory line being accessed. The sidecar bank includes a second portion with A bits of the M bits of the memory line being accessed. The primary bank and the sidecar bank have a same height, which is less than a height that would be used if the primary bank included all M bits in each memory line. The completion of the access request for the M bits of the memory line is done at a similar time, such as a same clock cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.