Resistive random access memory apparatus with forward and reverse reading modes
US9576652B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2016 |
| Grant date | Feb 21, 2017 |
| Priority date | — |
| Expiry date | Jan 11, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention provides a resistive memory apparatus including at least one first resistive memory cell, a first bit line selecting switch, a first source line selecting switch, a first pull down switch and a second pull down switch. The first bit line selecting switch is coupled between a first bit line and a sense amplifier. The first source line selecting switch is coupled between a source line and the sense amplifier. The first and second pull down switches are respectively coupled to the bit line and source line. When a reading operation is operated, on or off statuses of the first bit line selecting switch and the second pull down switch are the same, on or off statuses of the first source line selecting switch and the first pull down switch are the same, and on or off statuses of the first and second pull down switches are complementary.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.