Monolithic three-dimensional NAND strings and methods of fabrication thereof

US9576975B2 · kind B2 · utility

Assignee

• Sandisk Technologies, Inc. · US

Inventors

• Yanli Zhang · San Jose, US
• James Kai · Santa Clara, US
• Raghuveer S. Makala · Campbell, US
• Jin Liu · San Jose, US
• Murshed Chowdhury · Fremont, US
• Camilla Huang · Milpitas, US
• Johann Alsmeier · San Jose, US

Key dates

• Filing date: Dec 3, 2015
• Grant date: Feb 21, 2017
• Expiry date: Dec 3, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B43/35
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A vertically repeating stack of a unit layer stack is formed over a substrate. The unit layer stack includes a sacrificial material layer, a lower silicon oxide material layer, a first silicon oxide material layer, and an upper silicon oxide material layer. A memory opening can be formed through the vertically repeating stack, and a layer stack including a blocking dielectric layer, a memory material layer, a tunneling dielectric, and a semiconductor channel can be formed in the memory opening. The sacrificial material layers are replaced with electrically conductive layers. The first silicon oxide material layer can be removed to form backside recesses. Optionally, portions of the memory material layer can be removed to from discrete charge storage regions. The backside recesses can be filled with a low-k dielectric material and/or can include cavities within a dielectric material to provide reduced coupling between electrically conductive layers.