Patent · US Active

Methods of forming low noise semiconductor devices

US9583595B2 · kind B2 · utility

0Cited by

9References

28Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Giovanni Calabrese · Munich, DE
Domagoj Siprak · Munich, DE
Wolfgang Molzer · Ottobrunn, DE
Uwe Hodel · Munich, DE

Key dates

Filing date	Sep 2, 2015
Grant date	Feb 28, 2017
Priority date	—
Expiry date	Sep 2, 2035

Classification

Technology area (CPC H)Electricity
CPC primaryH01L21/2658
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Disclosed herein are Lateral Diffused Metal Oxide Semiconductor (LDMOS) device and trench isolation related devices, methods, and techniques. In one illustration, a doped region is formed within a semiconductor substrate. A trench isolation region is formed within the doped region. The doped region and the trench isolation region are part of a Lateral Diffused Metal Oxide Semiconductor (LDMOS) device. The trench isolation region or an interface between the trench isolation region and the doped region is configured to reduce low frequency noise in the LDMOS device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.