Patent · US Active

Substrate, chip arrangement, and method for manufacturing the same

US9585241B2 · kind B2 · utility

1Cited by

2References

17Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Wolfram Hable · Dresden, DE
Andreas Grassmann · Villach, AT
Frank Winter · Mühlheim, DE
Ottmar Geitner · Pentling, DE
Alexander Schwarz · Soest, DE
Alexander Herbrandt · Warstein, DE

Key dates

Filing date	Sep 24, 2013
Grant date	Feb 28, 2017
Priority date	—
Expiry date	Dec 12, 2033

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY10T29/49146
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

In various embodiments, a substrate is provided. The substrate may include: a ceramic carrier having a first side and a second side opposite the first side; a first metal layer disposed over the first side of the ceramic carrier; a second metal layer disposed over the second side of the ceramic carrier; and a cooling structure formed into or over the second metal layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.