Workpiece with semiconductor chips, semiconductor device and method for producing a workpiece with semiconductor chips
US9601475B2 · kind B2 · utility
0Cited by
33References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2016 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Feb 11, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.