Systems and methods of executing multiple hypervisors using multiple sets of processors
US9606818B2 · kind B2 · utility
4Cited by
13References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2013 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Apr 1, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/656
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a primary hypervisor that is executable on a first set of processors and a secondary hypervisor that is executable on a second set of processors. The primary hypervisor may define settings of a resource and the secondary hypervisor may use the resource based on the settings defined by the primary hypervisor. For example, the primary hypervisor may program memory address translation mappings for the secondary hypervisor. The primary hypervisor and the secondary hypervisor may include their own schedulers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.