Method for simultaneous structuring and chip singulation

US9610543B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Thomas Grille · Villach, AT
• Ursula Hedenig · Villach, AT
• Michael Roesner · Villach, AT
• Gudrun Stranzl · Eisenlohrsweg, AT
• Martin Zgaga · Rosegg, AT

Key dates

• Filing date: Jan 31, 2014
• Grant date: Apr 4, 2017
• Expiry date: Mar 20, 2035

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T428/24273
• WIPO field: Chemical engineering
• WIPO sector: Chemistry

Abstract

A method for structuring a substrate and a structured substrate are disclosed. In an embodiment a method includes providing a substrate with a first main surface and a second main surface, wherein the substrate is fixed to a carrier arrangement at the second main surface, performing a photolithography step at the first main surface of the substrate to mark a plurality of sites at the first main surface, the plurality of sites corresponding to future perforation structures and future kerf regions for a plurality of future individual semiconductor chips to be obtained from the substrate, and plasma etching the substrate at the plurality of sites until the carrier arrangement is reached, thus creating the perforation structures within the plurality of individual semiconductor chips and simultaneously separating the individual semiconductor chips along the kerf regions.