Patent · US Active

Triple patterning NAND flash memory

US9613806B2 · kind B2 · utility

0Cited by

11References

16Claims

0Family size

Assignee

Sandisk Technologies, Inc. · US

Inventors

Jongsun Sel · Los Gatos, US
Tuan Pham · Santa Clara, US
Mun-Pyo Hong · Seongnam-si, KR

Key dates

Filing date	Sep 4, 2013
Grant date	Apr 4, 2017
Priority date	—
Expiry date	Feb 19, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH10B41/35
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A NAND flash memory array is initially patterned by forming a plurality of sidewall spacers according along sides of patterned portions of material. The pattern of sidewall spacers is then used to form a second pattern of hard mask portions including first hard mask portions defined on both sides by sidewall spacers and second hard mask portions defined on only one side by sidewall spacers.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.