Patent · US Active

Memory having a continuous channel

US9613973B2 · kind B2 · utility

3Cited by
3References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 20, 2015
Grant dateApr 4, 2017
Priority date
Expiry dateAug 20, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B43/27

Abstract

The present disclosure includes memory having a continuous channel, and methods of processing the same. A number of embodiments include forming a vertical stack having memory cells connected in series between a source select gate and a drain select gate, wherein forming the vertical stack includes forming a continuous channel for the source select gate, the memory cells, and the drain select gate, and removing a portion of the continuous channel for the drain select gate such that the continuous channel is thinner for the drain select gate than for the memory cells and the source select gate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.