Methods of forming self-aligned contacts on FinFET devices
US9627274B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2016 |
| Grant date | Apr 18, 2017 |
| Priority date | — |
| Expiry date | Jul 20, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
Abstract
One illustrative method disclosed herein includes, among other things, forming a first sacrificial layer comprising amorphous silicon or polysilicon material around a fin in a lateral space between a plurality of laterally spaced apart gate structures that are positioned around the fin, performing a first selective etching process to remove a first sacrificial layer selectively relative to surrounding material so as to expose the fin in the lateral space, forming an epi material on the exposed portion of the fin, and forming a second layer of a sacrificial material above the epi material. The method also includes selectively removing the second layer of sacrificial material relative to at least the first layer of material to thereby define a source/drain contact opening that exposes the epi material and forming a self-aligned trench conductive source/drain contact structure that is conductively coupled to the epi material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.