Dielectric repair for emerging memory devices
US9627608B2 · kind B2 · utility
2Cited by
10References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2014 |
| Grant date | Apr 18, 2017 |
| Priority date | — |
| Expiry date | Sep 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Systems and method include providing a non-volatile random access memory (NVRAM) stack including a plurality of layers. The plurality of layers includes a dielectric layer and a metal layer. The metal layer of the NVRAM stack is patterned. The patterning causes damage to lateral side portions of the dielectric layer. The lateral portions of the dielectric layer are repaired by depositing dielectric material on the lateral side portions of the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.