Voltage doubling circuit and charge pump applications for the voltage doubling circuit
US9634562B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 9, 2016 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Jun 9, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/073
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A voltage doubler circuit supports operation in a positive voltage boosting mode to positively boost voltage from a first node to a second node and operation in a negative voltage boosting mode to negatively boost voltage from the second node to the first node. The voltage doubler circuits receive two clock signals having different high voltage levels. A series of voltage doubler circuit are connected in a charge pump with controllable operation in the first and second modes. A connecting circuit interconnects the first and second nodes of the voltage doubler circuits to provide a first connection path, with a first input voltage, to support the positive voltage boosting mode operation and a second connection path, with a proper input voltage, to support the negative voltage boosting mode. A discharge circuit is provided to discharge the voltage doubler circuits when operation of the charge pump circuit is terminated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.