Cache replacement policy that considers memory access type
US9652398B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2014 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Jan 28, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/604
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An associative cache memory, comprising: an array of storage elements arranged as M sets by N ways; an allocation unit allocates the storage elements in response to memory accesses that miss in the cache memory. Each memory access selects a set. Each memory access has an associated memory access type (MAT) of a plurality of predetermined MATs. Each valid storage element has an associated MAT; a mapping that includes, for each MAT, a MAT priority. In response to a memory access that misses in the array, the allocation unit: determines a most eligible way and a second most eligible way of the selected set for replacement based on a replacement policy; and replaces the second most eligible way rather than the most eligible way when the MAT priority of the most eligible way is greater than the MAT priority of the second most eligible way.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.