Method for fabricating a structure
US9653536B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2013 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Dec 2, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26506
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a structure comprising, in succession, a support substrate, a dielectric layer, an active layer, a separator layer of polycrystalline silicon, comprising the steps of: a) providing a donor substrate, b) forming an embrittlement area in the donor substrate, c) providing the support structure, d) forming the separator layer on the support substrate, e) forming the dielectric layer, f) assembling the donor substrate and the support substrate, g) fracturing the donor substrate along the embrittlement area, h) subjecting the structure to a strengthening annealing of at least 10 minutes, the fabrication method being noteworthy in that step d) is executed in such a way that the polycrystalline silicon of the separator layer exhibits an entirely random grain orientation, and in that the strengthening annealing is executed at a temperature strictly greater than 950° C. and less than 1200° C.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.