Method for increasing pattern density in self-aligned patterning integration schemes
US9673059B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2016 |
| Grant date | Jun 6, 2017 |
| Priority date | — |
| Expiry date | Jan 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32137
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a method for increasing pattern density of a structure on a substrate using an integration scheme comprising: providing a substrate having a patterned layer comprising a first mandrel and an underlying layer; performing a first conformal spacer deposition creating a first conformal layer; performing a first spacer reactive ion etch (RIE) process on the first conformal layer, creating a first spacer pattern; performing a first mandrel pull process removing the first mandrel; performing a second conformal spacer deposition creating a second conformal layer; performing a second RIE process creating a second spacer pattern, the first spacer pattern acting as a second mandrel; performing a second mandrel pull process removing the first spacer pattern; and transferring the second spacer pattern into the underlying layer; where the integration targets include patterning uniformity, pulldown of structures, slimming of structures, and gouging of the underlying layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.