Cascode structures for GaN HEMTs

US9679981B2 · kind B2 · utility

Assignee

• Cree, Inc. · US

Inventors

• Saptharishi Sriram · Cary, US
• Terry Alcorn · Cary, US
• Fabian Radulescu · Chapel Hill, US
• Scott Sheppard · Chapel Hill, US

Key dates

• Filing date: Jun 9, 2013
• Grant date: Jun 13, 2017
• Expiry date: Jun 9, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8503

Abstract

A multi-stage transistor device is described. One embodiment of such a device is a dual-gate transistor, where the second stage gate is separated from a barrier layer by a thin spacer layer and is grounded through a connection to the source. In one embodiment the thin spacer layer and the second stage gate are placed in an aperture in a spacer layer. In another embodiment, the second stage gate is separated from a barrier layer by a spacer layer. The device can exhibit improved linearity and reduced complexity and cost.